When a semiconductor device such as a metal-oxide-semiconductor field-effect transistors (MOSFETs) is scaled down through various technology nodes, high k dielectric material and metal are adopted to form a gate stack. In a method to form a metal gate stack, various dry and wet etching processes are implemented. For example, when a capping layer interposed between the high k dielectric material layer and the metal gate layer, a wet etching process is implemented between two dry etching processes in order to remove the capping layer and reduce the severe residue. Thus, it takes multiple etching steps and various etching tools to form a metal gate stack. In this example, it includes a dry etching process, a wet etching process and a second dry etching process. However, such a metal gate etching method involves a complicated processing sequence and a long processing cycle time, and leads to high manufacturing cost.